Dr. Vincent Leung

Education

• PhD, Electrical and Computer Engineering, University of California, San Diego (2004)
• M. Eng. EE, McGill University, Montreal, Canada (1997)
• B. Eng. (Honors) EE, McGill University, Montreal, Canada (1995)
   

GOOGLE SCHOLAR PROFILE

Research Interests

• RF/ mixed-signal ICs
• Ultra-low-power IoT circuits and systems
• ICs for neurotechnology and biomedical applications
• Wireless communication electronics for commercial and military applications

Experience

• Qualcomm Institute UCSD (San Diego, CA), Technical Director of Circuits Labs, April 2016 - July 2020
• Qualcomm CDMA Technologies (San Diego, CA), Senior Staff Engineer, July 2008 - April 2016
• Columbia University (New York, NY), Adjunct Assistant Professor, Sept. 2005 - Dec. 2007
• Silicon Laboratories (Somerset, NJ), Senior Design Engineer, Sept 2005 - June 2008
• IBM T. J. Watson Research (Yorktown Heights, NY), Research Staff Member, Sept. 2004 - Sept. 2005
• Analog Devices (Somerset, NJ), Analog IC Designer, Sept 1997 - August 2000

Selected Publications

• V. Leung, M. Stambaugh, S. Abbasi, P. Asbeck, D. Gough, M. Makale, K. Murphy, "A compact battery-powered rTMS prototype," presented in Int. Conf. of IEEE Engineering in Medicine and Biology Conference (EMBC), July 2020.
• V. Leung, L. Cui, S. Alluri, J. Lee, J. Huang, E. Mok, S. Shellhammer, R. Rao, P. Asbeck, P. Mercier, L. Larson, A. Nurmikko, F. Laiwalla, “Distributed microscale brain implants with wireless power transfer and Mbps bi-directional networked communications”, IEEE Custom Integrated Circuits Conf. (CICC), pp. 1-4, April 2019.
• J. Jeong, F. Laiwalla, J. Lee, R. Ritasalo, M. Oudas, L. Larson, V. Leung, A. Nurmikko, “Conformal hermetic sealing of wireless microelectronic implantable chiplets by multilayered atomic layer deposition (ALD)”, Advanced Functional Materials, vol. 29, issue 5, Dec. 2018. (https://doi.org/10.1002/adfm.201806440)
• V. Leung, J. Lee, S. Li, S. Yu, C. Kilfoyle, L. Larson, A. Nurmikko, F. Laiwalla, “A CMOS distributed sensor system for high-density wireless neural implants for brain-machine interfaces,” IEEE European Solid-State Circuits Conf. (ESSCIRC), pp. 230-233, Sept. 2018.
• H. Gheidi, T. Nakatani, V. Leung, P. Asbeck, “A 1-3 GHz delta-sigma-based closed-loop fully digital phase modulator in 45nm CMOS SOI”, J. of Solid-State Circuits, vol. 52, pp. 1185-1195, May 2017.